10 A gate having two inputs A B and one output Y is

Last updated: 6/13/2023

10 A gate having two inputs A B and one output Y is implemented using a 4 to 1 multiplexer as shown in Fig A MSB and Ao are the control bits and I I are the inputs to the multiplexer The gate is NAND AB A To I 1 13 4 to 1 Multiplexer A Ao 0 Y